Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate
2011-07-19
2011-07-19
Cho, James (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
C326S094000, C716S108000
Reexamination Certificate
active
07982502
ABSTRACT:
A synchronous circuit design is converted to an asynchronous circuit by converting synchronous circuit logic to an asynchronous circuit logic, and converting one or more asynchronous inputs at a circuit boundary to an asynchronous input to the converted asynchronous circuit logic, such that the converted asynchronous input is operable to generate a token upon observing a change in state on the asynchronous input. One or more asynchronous outputs at a circuit boundary is converted to an asynchronous output from the converted asynchronous circuit logic, such that the converted asynchronous output is operable to output updated data as soon as changed data is received from the converted asynchronous circuit logic in the asynchronous output.
REFERENCES:
patent: 7584449 (2009-09-01), Beerel et al.
patent: 7739628 (2010-06-01), Manohar et al.
Ekanayake Virantha
Kelly Clinton W.
LaFrieda Christopher
Manohar Rajit
Nijssen Raymond
Achronix Semiconductor Corporation
Cho James
Schwegman Lundberg & Woessner, P.A.
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