Asynchronous arbiter with bounded resolution time and...

Details Asynchronous arbiter with bounded resolution time and... Asynchronous arbiter with bounded resolution time and...

2007-05-29

2007-05-29

Myers, Paul R. (Department: 2111)

Electrical computers and digital data processing systems: input/

Access arbitrating

Centralized arbitrating

C326S094000, C327S019000

Reexamination Certificate

active

11019702

ABSTRACT:
An arbiter circuit (100) can include a latch (106) that latches competing input signals (Req_A and Req_B) to generate latch output signals (latn1and latn2). A filter section (108) can prevent metastable states of latch output signals (latn1and latn2) from propagating through to output signals (Sel_A and Sel_B). If both input signals (Req_A and Req_B) are activated, a feedback circuit (110) can activate a feedback signal (fb) after a predetermined delay (δ), provided both output signals (Sel_A and Sel_B) remain inactive.

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