Asymmetrical transistor having a gate dielectric which is substa

Details Asymmetrical transistor having a gate dielectric which is substa Asymmetrical transistor having a gate dielectric which is substa

1997-06-20

1999-07-06

Crane, Sara

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257344, 257345, H01L 2976

Patent

active

059201037

ABSTRACT:
A transistor fabrication process is provided which derives a benefit from having an asymmetrical LDD structure. A gate oxide layer is grown across a silicon-based substrate. A polysilicon layer is then deposited across the gate oxide layer. Portions of the polysilicon layer and the oxide layer are removed to form a gate conductor and gate oxide, thereby exposing source-side and drain-side junctions within the substrate. The source-side and drain-side junctions are implanted with a dopant to form LDD areas therein. The source-side junction may then be exclusively implanted to form a heavily doped source region in the source-side junction. An etch stop material may be formed upon opposed sidewall surfaces of the gate conductor, the upper surface of the gate conductor, and the source-side and drain-side junctions. Spacers may then be formed laterally adjacent the etch stop material located upon sidewall surfaces of the gate conductor. The unmasked portions of the source-side and drain-side junctions are heavily doped, resulting in source and drain regions that are aligned to the exposed lateral edges of the spacers. The drain-side spacer is removed and barrier atoms are forwarded through the exposed etch stop material and into a substrate/gate oxide interface region near the drain junction. The barrier atoms help reduce hot electron effects by blocking diffusion avenues of carriers (holes or electrons) from the drain-side junction into the gate oxide.

REFERENCES:
patent: 4356623 (1982-11-01), Hunter
patent: 4835112 (1989-05-01), Pfiester et al.
patent: 5286664 (1994-02-01), Horiuchi
patent: 5369297 (1994-11-01), Kusunoki et al.
patent: 5382533 (1995-01-01), Ahmad et al.
patent: 5436482 (1995-07-01), Ogoh
patent: 5460992 (1995-10-01), Hasegawa
patent: 5516707 (1996-05-01), Loh et al.
patent: 5554871 (1996-09-01), Yamashita et al.
patent: 5648284 (1997-07-01), Kusunoki et al
patent: 5650344 (1997-07-01), Ito et al.
patent: 5668028 (1997-09-01), Bryant
patent: 5674788 (1997-10-01), Wristers et al.
patent: 5705439 (1998-01-01), Chang
patent: 5712208 (1998-01-01), Tseng et al.
patent: 5726087 (1998-03-01), Tseng et al.
patent: 5759897 (1998-06-01), Kadosh et al.
Advanced Products Research and Development Laboratory, Motorola, Inc., Austin, Texas, "Suppression of MOSFET Reverse Short Channel Effect by N2O Gate Poly Reoxidation Process," Tsui, et al., Published by IEEE, New York, 1994, 4 pages.

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