Asymmetric studs and connecting lines to minimize stress

Details Asymmetric studs and connecting lines to minimize stress Asymmetric studs and connecting lines to minimize stress

1993-11-18

1996-04-02

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257759, 257760, 257774, H01L 2348, H01L 2946, H01L 2954, H01L 2962

Patent

active

055043755

ABSTRACT:
In the design of stud and conducting line joints, the conducting line is extended beyond the stud without any significant overhang of the line in the width direction for minimizing induced stress in order to reduce voids and crack growth in the region where the connecting line is joined to the stud. The preferred length of the extension is in the range approximately between one-quarter and twice the stud dimension. The design is applicable, but not limited to, multilevel integrated circuits used in computers and other electrical devices.

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