Asymmetric static random access memory device having reduced...

Details Asymmetric static random access memory device having reduced... Asymmetric static random access memory device having reduced...

2007-01-02

2007-01-02

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S208000, C365S202000

Reexamination Certificate

active

10635185

ABSTRACT:
An SRAM device comprising a column having opposing bit lines, asymmetric memory cells spanning the opposing bit lines in alternating orientations, and a sense amplifier. The sense amplifier includes sensing circuitry configured to sense values stored in the cells and switching circuitry configured to apply signals to the sensing circuitry as a function of the orientations.

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Navid Azizi et al., “Low-Leakage Asymmetric-Cell SRAM” ISLPED '02, Aug. 12-14, 2002, Monterey, California, USA.

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