Asymmetric semiconductor devices and method of fabricating

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S412000, C257S369000, C257S900000

Reexamination Certificate

active

07999332

ABSTRACT:
A semiconductor structure is provided that includes an asymmetric gate stack located on a surface of high k gate dielectric. The asymmetric gate stack includes a first portion and a second portion, wherein the first portion has a different threshold voltage than the second portion. The first portion of the inventive asymmetric gate stack includes, from bottom to top, a threshold voltage adjusting material and at least a first conductive spacer, while the second portion of the inventive asymmetric gate stack includes at least a second conductive spacer over the gate dielectric. In some embodiments, the second conductive spacer is in direct contact with the underlying high k gate dielectric, while in other embodiments, in which the first and second conductive spacers are comprised of different conductive materials, the base of the second conductive spacer is in direct contact with the threshold adjusting material.

REFERENCES:
patent: 5763311 (1998-06-01), Gardner et al.
patent: 5789298 (1998-08-01), Gardner et al.
patent: 5841168 (1998-11-01), Gardner et al.
patent: 5963809 (1999-10-01), Duane et al.
patent: 6008094 (1999-12-01), Krivokapic et al.
patent: 6127235 (2000-10-01), Gardner et al.
patent: 6153905 (2000-11-01), Davies et al.
patent: 6180502 (2001-01-01), Liang
patent: 6187675 (2001-02-01), Buynoski
patent: 6503786 (2003-01-01), Klodzinski
patent: 6605845 (2003-08-01), Liang
patent: 6630720 (2003-10-01), Maszara et al.
patent: 6664594 (2003-12-01), Klodzinski
patent: 6686245 (2004-02-01), Mathew et al.
patent: 6800905 (2004-10-01), Fried et al.
patent: 6831310 (2004-12-01), Mathew et al.
patent: 6903967 (2005-06-01), Mathew et al.
patent: 6921700 (2005-07-01), Orlowski et al.
patent: 6967143 (2005-11-01), Mathew et al.
patent: 6974729 (2005-12-01), Collaert et al.
patent: 7018876 (2006-03-01), Mathew et al.
patent: 7064019 (2006-06-01), Fried et al.
patent: 7098502 (2006-08-01), Mathew et al.
patent: 7112832 (2006-09-01), Orlowski et al.
patent: 7120046 (2006-10-01), Forbes
patent: 7144782 (2006-12-01), Ehrichs
patent: 7183164 (2007-02-01), Haller
patent: 7192876 (2007-03-01), Mathew et al.
patent: 7199419 (2007-04-01), Haller
patent: 7202517 (2007-04-01), Dixit et al.
patent: 7229895 (2007-06-01), Wells
patent: 7247570 (2007-07-01), Thomas
patent: 7285812 (2007-10-01), Tang et al.
patent: 7288445 (2007-10-01), Bryant et al.
patent: 7326611 (2008-02-01), Forbes
patent: 7354831 (2008-04-01), Orlowski
patent: 7368344 (2008-05-01), Haller
patent: 7368365 (2008-05-01), Wells
patent: 7371627 (2008-05-01), Forbes
patent: 7372092 (2008-05-01), Manning et al.
patent: 2002/0020873 (2002-02-01), Klodzinski
patent: 2003/0034522 (2003-02-01), Klodzinski
patent: 2008/0057635 (2008-03-01), Chen
patent: 2009/0294873 (2009-12-01), Zhu et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Asymmetric semiconductor devices and method of fabricating does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Asymmetric semiconductor devices and method of fabricating, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Asymmetric semiconductor devices and method of fabricating will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2690175

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.