Asymmetric operation method of non-volatile memory structure

Details Asymmetric operation method of non-volatile memory structure Asymmetric operation method of non-volatile memory structure

2006-09-07

2010-06-29

Fahmy, Wael (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE21269, C365S185180

Reexamination Certificate

active

07745872

ABSTRACT:
An operation method for a non-volatile memory structure formed between two doping regions serving as bit lines in a semiconductor substrate, the non-volatile memory structure comprising a first conductive line serving as a select gate and being formed above the semiconductor substrate, two conductive blocks serving as floating gates and being formed at the two sides of the first conductive line and insulated from the first conductive line with two first dielectric spacers therebetween, a first dielectric layer formed on the two second conductive blocks, a second conductive line serving as a word line and being formed on the first dielectric layer and substantially perpendicular to the two doping regions. While reading the programmed status of one of the conductive blocks, a bias voltage is applied to the doping region next to the conductive block to be read, a bias voltage is applied to the second conductive line, and a bias voltage is applied to the first conductive line next to the conductive block to be read, so as to turn on the select gate and form an inversion layer underneath the select gate; and the doping region, the channel under the conductive block and the inversion layer under the select gate form a reading path during the reading operation.

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