Electrical computers and digital data processing systems: input/ – Access arbitrating
Reexamination Certificate
2007-06-05
2010-10-12
Rinehart, Mark (Department: 2111)
Electrical computers and digital data processing systems: input/
Access arbitrating
C710S260000, C713S300000, C713S600000, C712S001000
Reexamination Certificate
active
07814252
ABSTRACT:
An asymmetric multiprocessor capable of increasing a degree of freedom of distributed processing, minimizing a processing load on each processor (CPU), and achieving a large reduction in power consumption by reducing an operating frequency or lowering the power supply voltage. An asymmetric multiprocessor includes a hardware resource mediator that mediates request signals requesting permission to use arbitrary hardware accelerators from CPU cores. A signal processing content selector selects signal processing content of a dynamically reconfigurable signal processor that is connected as a slave A clock skew mediator arbitrarily shifts a clock phase relationship among groups, while clock delay generators delay a clock signal based on a clock skew selection enable signal.
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English language Abstract of JP 2004-252900.
Greenblum & Bernstein P.L.C.
Huynh Kim T
Panasonic Corporation
Rinehart Mark
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