Asymmetric floating gate overlap for improved device characteris

Details Asymmetric floating gate overlap for improved device characteris Asymmetric floating gate overlap for improved device characteris

1991-08-14

1994-02-22

Ngo, Ngan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257317, 257321, H01L 2968, H01L 2978

Patent

active

052890260

ABSTRACT:
An electrically erasable non-volatile EPROM memory device having an asymmetric floating gate with respect to a buried source region and a buried drain region is disclosed. A patterned floating gate member is formed over a portion of the source region and a portion of the drain region producing a floating gate-to-source overlap and a floating gate-to-drain overlap, respectively, such that the floating gate-to-source overlap is less than the floating gate-to-drain overlap.

REFERENCES:
patent: 4698787 (1987-10-01), Mukherjee
patent: 4780424 (1988-10-01), Holler
patent: 5028979 (1991-07-01), Mazzali

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