Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1993-11-23
1995-01-31
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257355, 257356, 257344, 257346, 257408, H01L 2906, H01L 2978
Patent
active
053861345
ABSTRACT:
An asymmetric electro-static discharge transistor includes a gate region formed on a substrate. The gate region includes a polysilicon gate region placed over a dielectric layer. A drain region is placed within the substrate. The drain region includes a first drain region implanted with atoms of a first conductivity type at a first concentration. The first drain region extends under the gate region. For example, the first drain region is a lightly doped n.sup.- region. A second drain region is formed adjacent to the first doped portion. The second drain region is implanted with atoms of the first conductivity type. For example, the second drain region is a heavily doped n.sup.+ region. A source region is formed within the substrate. The source region extends under the gate region. The source region is implanted with atoms of the first conductivity type. For example, the source region is a heavily doped n.sup.+ region.
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D. Krakauer, K. Mistry, ESD Protection in a 3.3 Volt Sub-Micron Silicided CMOS Technology, EOS/ESD Symposium, 1992, pp. 250-257.
T. Yamaguchi, et al., High-Speed Latchup-Free 0.5 .mu.m-Channel CMOS Using Self-Aligned TiSi.sub.2 and Deep-Trench Isolation Technologies, IEDM 83, 24.3, 1983 pp. 522-525.
Carroll J.
VLSI Technology Inc.
Weller Douglas L.
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