Asymmetric data mirroring

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Reexamination Certificate

active

07549080

ABSTRACT:
An asymmetric data mirroring method with a local storage device and a remote storage device being separated by large distances is disclosed. A server determines a predetermined time period associated with a round trip latency between the server and a remote storage device. The server submits a request to a local storage device, a remote storage device and a memory device disposed between the server and the remote storage device. The server submits additional requests to the local and remote storage devices during the predetermined time period. The server stores a copy of each request submitted by the server to the remote storage device in a memory disposed between the server and the remote storage device while the server waits for whether an acknowledgement associated with the request has been received from the remote storage device during the predetermined time period. The server resubmits the request and the additional requests to the remote storage device if the acknowledgement is not received. If an acknowledgement is received, the server continues submission of additional new requests to the local and remote storage devices. An acknowledgement is received by the server from the memory disposed between the server and the remote storage device for each request from the server. The contents of the memory are written to the remote storage device if the acknowledgments from the memory are not received by the server. If the memory disposed between the server and the remote storage device fails to acknowledge the server, the contents of a memory associated with the server are written to the remote storage device. When either memory has been successfully written to the remote storage device, normal I/O operations continue. If neither memory has successfully written to the remote storage device, an error state is triggered.

REFERENCES:
patent: 6647474 (2003-11-01), Yanai et al.
patent: 6976186 (2005-12-01), Gardner
patent: 7340490 (2008-03-01), Teloh et al.
patent: 2003/0014432 (2003-01-01), Teloh et al.
patent: 2003/0014433 (2003-01-01), Teloh et al.
patent: 2003/0014523 (2003-01-01), Teloh et al.

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