Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-05-15
2007-05-15
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S108000
Reexamination Certificate
active
11018993
ABSTRACT:
An associative memory with an invert result capability to allow the identification of an entry as being matched when an entry or portion thereof is specifically not matched is disclosed (or alternatively viewed as an entry or portion thereof indicated as matched when it actually was not matched). One such associative memory typically includes multiple associative memory entries, each of which typically includes storage for one or more subsets of bits to be used in matching a lookup value and for one or more invert result indications to identify whether or not corresponding particular subsets of the one or more subsets of bits are to be inverted in producing an entry match result. Result generation logic is used to identifying the entry match result based on a comparison of the one or more subsets of bits with the lookup value and responsive to the one or more invert result indications to invert an intermediate comparison result for the one or more subsets of bits as indicated by the one or more invert result indications.
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Kaluve Shyamasundar S.
Pullela Venkateshwar Rao
Birkhimer Christopher D
Cisco Technology Inc.
Kim Matthew
The Law Office of Kirk D. Williams
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