Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-06-21
2005-06-21
Sparks, Donald D (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S108000, C365S049130, C710S049000
Reexamination Certificate
active
06910105
ABSTRACT:
When one or more storage data are coincident with single search data (12), an associative memory (1) carries out logical sum for all of storage data with a valid state for storage data as true. The result of logical sum is used as matched data logical-OR information. In a primary searching operation, the associative memory (1) is supplied with the search data (12) to provide the matched data logical-OR information on matched data logical-OR lines. Then, the associative memory (1) carries out a secondary searching operation supplied as search data with the matched data logical-OR information obtained by all of storage data coincident upon the primary searching operation. Only a match line (5) coincident with the matched data logical-OR information is selected as the secondary search result. The associative memory is used in a network router to calculate an optimum memory address signal (403) by encoding the selected match line (5). In response to the memory address signal (403), a memory data signal (405) enabling shortest network connection is produced as a transfer network address (413). The transfer network address (413) is combined with a data area (412) and a destination network address (411) contained in input transfer data (408) to produce output transfer data (409).
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International Search Report re International Application No. PCT/JP01/04534 dated Aug. 28, 2001.
Dinh Ngoc V
Sparks Donald D
Terminus Technology Limited
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