Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-06-27
2006-06-27
Elmore, Stephen C. (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S100000, C711S108000, C711S154000, C365S049130
Reexamination Certificate
active
07069386
ABSTRACT:
An associative memory support for a data processing system includes an associative memory device containing n-cells. A controller is provided for issuing an instruction to the associative memory device. A clock device outputs a synchronizing clock signal that includes a predetermined number of clock cycles per second, the clock device outputting the synchronizing clock signal to the associative memory device and the controller. The controller globally communicates the instruction to all of the n-cells simultaneously, within one of the clock cycles and the instruction is applied equally to each of the n-cells.
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Stefan Gheorghe
Thiebaut Dominique
Tomescu Dan
Connex Technology, Inc.
Elmore Stephen C.
McCormick Paulding & Huber LLP
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