Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-03-15
2011-03-15
Choe, Yong (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C710S068000, C708S203000, C709S247000, C382S232000, C382S239000, C382S244000
Reexamination Certificate
active
07908438
ABSTRACT:
Associative matrix compression methods, systems, computer program products and data structures compress an association matrix that contains counts that indicate associations among pairs of attributes. Selective bit plane representations of those selected segments of the association matrix that have at least one count is performed, to allow compression. More specifically, a set of segments is generated, a respective one of which defines a subset, greater than one, of the pairs of attributes. Selective identifications of those segments that have at least one count are stored. The at least one count that is associated with a respective identified segment is also stored as at least one bit plane representation. The at least one bit plane representation identifies a value of the at least one associated count for a bit position of the count that corresponds to the associated bit plane.
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Aparicio, IV Manuel
Fleming James S.
Lemen Michael J.
Choe Yong
Myers Bigel & Sibley & Sajovec
Saffron Technology Inc.
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