Assisting write operations to data storage cells

Static information storage and retrieval – Read/write circuit – Particular write circuit

Reexamination Certificate

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C365S154000

Reexamination Certificate

active

08045402

ABSTRACT:
A data store and method of storing data is disclosed that comprises: an input for receiving a data value; at least one storage cell comprising: a feedback loop for storing the data value; an output for outputting the stored data value; the feedback loop receiving a higher voltage and a lower voltage as power supply, the data store further comprising: a voltage supply for powering the data store, the voltage supply outputting a high voltage level and a low voltage level; write assist circuitry arranged between the voltage supply and the at least one storage cell, the write assist circuitry being responsive to a pulse signal to provide a discharge path between the high voltage level and a lower voltage level and thereby generate a reduced internal voltage level from the high voltage level for a period dependent on a width of the pulse signal, the reduced internal voltage level being lower than the high voltage level, such that when powered the feedback loop receives the reduced internal voltage level as the higher voltage for a period determined by the pulse width and the high voltage level at other times; and pulse signal generation circuitry for generating said pulse signal.

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Pilo, Harold et al., “An SRAM Design in 65nm and 45nm Technology Nodes Featuring Read and Write-Assist Circuits to Expand Operating Voltage”, 2006 Symposium on VLSI Circuits Digest of Technical Papers, 2 pages, (2006).
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