Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-05-30
2006-05-30
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
07055116
ABSTRACT:
An assertion based transaction recording method is used to represent a signal-level transaction having a prefix and a suffix as an abstract transaction. The method models the signal-level transaction as an assertion requiring that the transaction suffix must occur following any occurrence of the transaction prefix. A finite-state-machine (FSM) implementation of the assertion records a tentative abstract transaction upon recognizing the first condition of the prefix. If the FSM recognizes that the prefix cannot complete, it cancels, or deletes, the tentative abstract transaction record. The implementation can track multiple tentative abstract transaction records that may co-exist prior to completion of the transaction prefix. Upon recognizing that the transaction prefix corresponding to the start point of the tentative abstract transaction has completed, the tentative abstract transaction record is committed. The FSM implementation of the assertion can then cancel all other outstanding tentative abstract transaction records.
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Lawrence James M.
Marschner Franz Erich
Ward Stephen T.
Bingham & McCutchen LLP
Cadence Design Systems Inc.
Dimyan Magid Y.
Whitmore Stacy A.
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