Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-03-20
2007-03-20
Bonzo, Bryce P. (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S051000, C714S055000
Reexamination Certificate
active
10066879
ABSTRACT:
An integrated circuit, a client computer system, and a method for operating the integrated circuit in the client computer system. The integrated circuit includes a first bus interface logic for coupling to a first external bus, a microcontroller configured as an Alert Standard Format management engine, and a watchdog timer coupled to the microcontroller. The microcontroller is further configured to receive Alert Standard Format sensor data over the first external bus. The watchdog timer is coupled to receive a reset input upon a predetermined change in a system state. The watchdog timer is further configured to provide an indication to the microcontroller in response to an expiration of the watchdog timer.
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Advanced Micro Devices , Inc.
Bonzo Bryce P.
Duncan Marc
Williams Morgan & Amerson
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