Array-type computer processor

Details Array-type computer processor Array-type computer processor

2007-10-23

2007-10-23

Sparks, Donald (Department: 2181)

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

C712S018000, C712S220000, C712S245000

Reexamination Certificate

active

11048071

ABSTRACT:
An array-type computer processor stops, with a plurality of computer programs held, a state control unit and a data-path unit, upon input of event data for task switching. The array-type computer processor obtains the operation state of the state control unit and the processed data of the data-path unit when stopped, and temporarily holds them for each of a plurality of the computer programs. Upon completion of this, the array-type computer processor reads the operation state and processed data of any other computer program and sets them in the state control unit and data-path unit. Upon completion of this, the array-type computer processor outputs to the state control unit the event data for starting the operation. The state control unit then starts to sequentially transfer the operation state, thereby making it possible to perform the process operations according to a plurality of computer programs in a time-sharing manner.

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Author: Stuart Fiske and William J. Dally, Title: “Thread Prioritization: A Thread Scheduling Mechanism for Multiple-Context Parallel Processors”, Date: Jan. 1995, Publisher: Proceedings of the First International Symposium on HPCA.
Snyder, Lawrence, “Introduction to the Configurable, Highly Parallel Computer”, IEEE, pp. 47-56 (Jan. 1992).

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