Array substrate having a supporter for a data pad, and...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material

Reexamination Certificate

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Details

C257S072000, C257SE33053

Reexamination Certificate

active

07943931

ABSTRACT:
A substrate includes an array area and a data pad area adjacent to the array area. A gate line, a data line and a switching device are formed in the array area of the substrate. A data pad extending from an end of the data line and a supporter provided between the substrate and the data pad are provided in a data pad area to allow the data pad to be placed at a higher position than a passivation layer. Thus, a contact resistance occurring between an anisotropic conductive film and a bump and a contact resistance occurring between the anisotropic conductive film and the data pad are reduced.

REFERENCES:
patent: 2003/0164919 (2003-09-01), Oh et al.
patent: 2004/0125252 (2004-07-01), Lee et al.
patent: 2006/0006385 (2006-01-01), Park
patent: 2006/0118763 (2006-06-01), Yun et al.
patent: 2006/0138422 (2006-06-01), Ahn et al.
patent: 2007/0243650 (2007-10-01), Kim et al.

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