Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2000-12-12
2004-05-11
Lee, Eddie (Department: 2811)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S149000, C438S128000
Reexamination Certificate
active
06734049
ABSTRACT:
This application claims the benefit of Korean Patent Application No. 1999-58109, filed on Dec. 16, 1999, which is hereby incorporated by reference for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an active-matrix liquid crystal display (LCD) device, and to a method of fabricating the same. More particularly it relates to an array substrate for an active-matrix LCD device having thin film transistors, and to a method of fabricating that array substrate.
2. Discussion of the Related Art
An active matrix type LCD device usually uses thin film transistors (TFTs) as switching devices. An LCD device is typically made up of two substrates having an interposed liquid crystal material. One substrate, referred to as the array substrate, includes a matrix array of TFTs and pixel electrodes. The opposing substrate, referred to as the color filter substrate, includes a light-shielding film (also known as a black matrix), a color filter, and a common electrode.
Because of its simple structure and superior quality, an inverted staggered type TFT is widely used on array substrates. The inverted, staggered type TFT can be classified into either a back-channel-etch type or an etch-stopper type. Those types are differentiated according to the methods of forming a channel in the TFT. Of the two, the back-channel-etch type has a simpler structure.
A typical array substrate manufacturing process requires repeated steps of depositing and patterning of various layers. The patterning steps use photolithography masks. Each step is facilitated by using one mask. The number of masks used in the manufacturing process is a critical factor in determining the number of patterning steps. In particular, manufacturing costs depend heavily on the number of masks used. Furthermore, the reliability of the resulting device can depend upon the number of patterning steps used.
Referring to the attached drawings, an array substrate of an LCD device that incorporates a back-channel-etching type TFT structure and that is manufactured by a conventional method will now be explained in some detail.
As shown in 
FIG. 1
, the LCD device 
20
 includes an array substrate 
2
, a color filter substrate 
4
 opposing the array substrate 
2
, an interposed liquid crystal 
10
, and a sealant 
6
 that is formed at the periphery of the gap between the two substrates 
2
 and 
4
. The sealant 
6
 prevents the liquid crystal 
10
 from leaking out of the LCD device 
20
.
The array substrate 
2
 includes a substrate 
1
, a TFT 
5
, and a pixel electrode 
14
. The TFT 
5
 acts as a switching element for changing the orientation of the liquid crystal 
10
, and the pixel electrode 
14
 is used as a first electrode to apply electric fields across the liquid crystal 
10
.
The color filter substrate 
4
 includes a substrate 
11
, a color filter 
8
, and a common electrode 
12
. The color filter 
8
 is used for displaying colors and the common electrode 
12
 is used as a second electrode to apply electric fields across the liquid crystal 
10
.
Referring to 
FIG. 2
, a more detailed description of the structure and operation of the array substrate 
2
 will be provided.
On the substrate 
1
, a gate line 
22
 is formed in a horizontal direction and a data line 
24
 is formed in a transverse direction. The pixel electrode 
14
 is formed within a rectangular area partially defined by the gate and data lines 
22
 and 
24
. Sometimes the pixel electrode 
14
 will overlap the gate and date lines 
22
 and 
24
. Near the crossing point of the gate and data lines 
22
 and 
24
, a portion of the gate line 
22
 forms a gate electrode 
26
. At one end of the gate line 
22
 is a gate pad 
18
 having a gate pad contact hole 
21
.
Near the crossing point of the gate and data lines 
22
 and 
24
, the data line 
24
 protrudes to form a source electrode 
28
. A drain electrode 
30
 is then formed at a position that is spaced apart from the source electrode 
28
. At one end of the data line 
24
 is a data pad 
20
 having a data pad contact hole 
23
.
Spaced apart from the drain electrode 
30
 and over a portion of the gate line 
22
 is an island-shaped capacitor electrode 
32
 that is formed at the same layer as the data line 
24
. A protruding portion of the pixel electrode 
14
 overlaps the capacitor electrode 
32
, and together with the gate line 
22
, forms a storage capacitor 
7
 that stores electric charges.
A capacitor contact hole 
36
 enables the capacitor electrode 
32
 to electrically connect to the pixel electrode 
14
. Another portion of the pixel electrode 
14
 overlaps a portion of the drain electrode 
30
. A drain contact hole 
34
 at the overlapped portion enables the pixel electrode 
14
 to electrically connect to the drain electrode 
30
.
As explained previously, the TFT 
5
, which includes the gate, source, and drain electrodes 
26
, 
28
 and 
30
, selectively applies an electric field to the liquid crystal 
10
 (shown in FIG. 
1
). In operation, if a signal is applied to the gate electrode 
26
 of the TFT 
5
, an electrical connection is established between the data line 
24
 and the pixel electrode 
14
. With the gate electrode 
26
 turned ON, an electric field is produced by the pixel electrode 
14
 in accordance with the signal applied to the data line 
24
 via the data pad 
20
.
Next, referring to 
FIGS. 3A
 to 
7
A and 
3
B to 
7
B, a more detailed description of the structure and the fabrication method of the TFT and the storage capacitor will be provided. 
FIGS. 3A
 to 
7
A illustrate sequential fabrication steps of a cross-section taken along a line “A—A” of 
FIG. 2
, and 
FIGS. 3B
 to 
7
B illustrate corresponding sequential fabrication steps of a cross-section taken along a line “B—B” of FIG. 
2
.
As shown in 
FIGS. 3A and 3B
, a first metallic material is deposited on a surface of the substrate 
1
. That metallic material is then patterned using a first mask to form the gate line 
22
, including the gate electrode 
26
. Also formed at this time is the gate pad 
18
 shown in FIG. 
2
. For the first metallic material, a highly conductive metal such as aluminum (Al), aluminum alloy, or molybdenum (Mo) is preferred.
As shown in 
FIGS. 4A and 4B
, a first insulating material is then deposited to form a gate insulating layer 
50
. On the gate insulating layer 
50
 a semiconductor material is then deposited and doped with impurities. That semiconductor material is then patterned with a second mask to form a semiconductor layer 
52
 having an ohmic contact layer 
54
. This defines a first intermediate structure.
Then, as shown in 
FIGS. 5A and 5B
, a second metallic material is deposited over the first intermediate structure and patterned using a third mask to form a source electrode 
28
, a drain electrode 
30
, and a data line 
24
. The data line 
24
 is connected to the source electrode 
28
 (FIG. 
5
A). At the same time, over a portion of the gate line 
22
, the second metallic material is used to form a capacitor electrode 
32
 while using the third mask (FIG. 
5
B).
Afterwards, a portion of the ohmic contact layer 
54
 is etched away to define a channel region 
56
 on the semiconductor layer 
52
 (FIG. 
5
A). At this point a second intermediate structure is defined. That second intermediate structure includes the TFT 
5
 comprised of the gate, source, and drain electrodes 
26
, 
28
, and 
30
, the semiconductor layer 
52
 having the channel region 
56
, and the ohmic contact layer 
54
.
As shown in 
FIGS. 6A and 6B
, a second insulating material is deposited over the second intermediate structure. That second insulating material is then patterned using a fourth mask to form a passivation layer 
58
. The passivation layer 
58
, which protects the TFT 
5
 and the capacitor electrode 
32
, is beneficially comprised of inorganic-based silicon nitride (SiN
x
), of silicon oxide (SiO
2
), or of an organic-based benzocyclobutene (BCB). Those materials are beneficial because they exhibit high light-transmissivity, are relatively moisture-proof, and have high du
Jung Yu-Ho
Kim Yong-Wan
Lee Woo-Chae
Yoo Soon-Sung
Lee Eddie
LG.Philips LCD Co. , Ltd.
McKenna Long & Aldridge LLP
Owens Douglas W.
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