Array substrate and method of fabricating the same

Details Array substrate and method of fabricating the same Array substrate and method of fabricating the same

2009-11-17

2010-11-16

Thai, Luan C (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S150000, C438S158000, C257S072000, C257SE21414, C257SE29294

Reexamination Certificate

active

07833846

ABSTRACT:
A method of fabricating an array substrate includes forming a buffer layer; forming a gate electrode on the buffer layer, a gate insulating layer on the gate electrode and an active layer on the gate insulating layer, the gate electrode including a bottom pattern, a middle pattern and a top pattern; forming an interlayer insulating layer, the first and second contact holes respectively exposing both sides of the active layer; forming first and second barrier patterns, first and second ohmic contact patterns, a source electrode, a drain, and a data line; forming a first passivation layer including a gate contact hole exposing the gate electrode; forming a gate line on the first passivation layer and contacting the gate electrode through the gate contact hole; forming a second passivation layer on the gate line; and forming a pixel electrode on the second passivation layer and contacting the drain electrode.

REFERENCES:
patent: 2008/0001529 (2008-01-01), Park et al.
patent: 2008/0012484 (2008-01-01), Park et al.
patent: 2008/0122349 (2008-05-01), Kim et al.
patent: 2010/0123138 (2010-05-01), Choi et al.

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