Array sense amplifiers, memory devices and systems including...

Details Array sense amplifiers, memory devices and systems including... Array sense amplifiers, memory devices and systems including...

2006-12-27

2009-10-20

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S205000, C365S196000, C365S204000, C365S203000

Reexamination Certificate

active

07606097

ABSTRACT:
A sense amplifier having an amplifier stage with decreased gain is described. The sense amplifier includes a first input/output (“I/O”) node and a second complementary I/O node. The sense amplifier includes two amplifier stages, each for amplifying a signal on one of the I/O nodes. The first amplifier stage, having a first conductivity-type, amplifies one of the I/O node towards a first voltage. The second amplifier stage, having a second conductivity-type, amplifies the other I/O node towards a second voltage. The sense amplifier also includes a resistance circuit coupled to the second amplifier stage to reduce the gain of the second amplifier stage thereby reducing the rate of amplification of the signal on the corresponding I/O node.

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