Array of finned memory cell capacitors on a semiconductor substr

Details Array of finned memory cell capacitors on a semiconductor substr Array of finned memory cell capacitors on a semiconductor substr

1993-06-22

1994-06-21

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257309, H01L 2968, H01L 2978, H01L 2992

Patent

active

053230388

ABSTRACT:
An array of finned memory cell capacitors on a semiconductor substrate includes: a) an array of electrically insulated word lines atop a semiconductor substrate; b) first and second active regions adjacent the word lines; c) capacitor storage nodes electrically connecting with the first active regions, individual capacitor storage nodes including: i) a layer of first conductive material conductively connecting with a first active region, the layer of first conductive material having opposed outer lateral edges, and ii) a layer of conductively doped storage node polysilicon overlying and conductively connecting with the layer of first conductive material, the storage node polysilicon projecting laterally outward beyond the outer lateral edges of the first conductive material to define opposing storage node capacitor fins projecting laterally above adjacent word lines; d) a layer of capacitor dielectric electrically connecting with the storage node capacitor fins; e) a layer of electrically conductive cell polysilicon electrically connecting with the capacitor dielectric layer; and f) bit lines electrically connecting with the second active regions. The invention also includes a method of forming memory cell capacitors.

REFERENCES:
patent: 5200635 (1993-04-01), Kaga et al.
patent: 5223729 (1993-01-01), Kudoh et al.

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