Array of field effect transistors of different threshold voltage

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257208, 257360, 257404, 257903, H01L 2976, H01L 2710, H01L 2362, H01L 2711

Patent

active

052850692

ABSTRACT:
A semiconductor integrated circuit apparatus has a basic cell region formed by arranging a plurality of basic cells each including a MOS transistor in longitudinal and transversal directions. The MOS transistor has source-drain section diffusive regions formed on a semiconductor substrate, and a gate electrode formed on a channel region between these source-drain section diffusive regions through a gate insulating film. One portion or all of the channel region of at least one MOS transistor within the basic cell region has an impurity concentration different from that in the channel region of another MOS transistor of the same conductivity type within the same basic cell. For example, a threshold voltage in the channel region of a MOS transistor is increased until about 6 volts by implanting ions into the channel region. No MOS transistor is operated at a power voltage such as 5 volts and separates MOS transistors on both sides thereof from each other. Wiring is formed on the MOS transistor and the gate electrode is used as the wiring, thereby improving wiring efficiency.

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patent: 4472871 (1984-09-01), Green et al.
patent: 4575743 (1986-03-01), Hashimoto
patent: 4600933 (1986-07-01), Richman
patent: 4814839 (1989-03-01), Nishizawa et al.
patent: 5067000 (1991-11-01), Eimori et al.
patent: 5083178 (1992-01-01), Otsu

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