Arrangement with image sensors

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S291000

Reexamination Certificate

active

07030434

ABSTRACT:
A memory transistor and a selection transistor of an image sensor are connected in series and between a bit line (B5) and a reference line (R5). A gate electrode of the selection transistor is connected to a word line (W5), which extends crosswise in relation to the bit line (B5). A diode of the image sensor is switched between a gate electrode (G5) of the memory transistor and a first source/drain area (S/D5) of the memory transistor, which is connected to the selection transistor in such a way is polarized towards the first source/drain area (S/D5) of the memory transistor and in the reverse direction. A photodiode of the image sensor is switched between a voltage connection and either the gate electrode (G5) of the memory transistor or the first source/drain area (S/D5) of the memory transistor in such a way that it is polarized towards the voltage connection and in the reverse direction.

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R. Hauschild, et al., “A CMOS Optical Sensor System Performing Image Sampling on a Hexagonal Grid,”ESSCIRC 1996. Proceedings of the 22ndEuropean Solid-State Circuits Conference, Proceedings of ESSCIRC 1996, Neuchatel, Switzerland, pp. 304-307 1996.
Eric Y. Chou, et al., “Low Power Salient Integration Mode Image Sensor with a Low Voltage Mixed-Signal Readout Architecture,”Proceedings 1998. International Symposium on Low Power Electronics and Design, Aug. 10-12, 1998.
Yoshinori Iida, et al., “A ¼-Inch 330k Square Pixel Progressive Scan CMOS Active Pixel Image Sensor,”IEEE Journal of Solid-State Circuits, pp. 2042-2047, 1998.
Eric R. Fossum, “CMOS Image Sensors: Electronic Camera On A Chip,”IEEE. pp. 17-25, 1995.

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