Arrangement of word line driver stage for semiconductor memory d

Details Arrangement of word line driver stage for semiconductor memory d Arrangement of word line driver stage for semiconductor memory d

1991-07-05

1994-06-07

Zazworsky, John

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365 63, 36523004, 3073031, G11C 800, G11C 700

Patent

active

053196058

ABSTRACT:
An arrangement of a word line driver stage for semiconductor memory device is disclosed. The present invention is characterized in that a word line driver stages are into several sub-stages WD11-WD51 within a memory cell array, and each word line extending from a first one or a second one of the sub-stages is alternatively coupled to the sub-stage adjacent thereto. Thus this arrangement is capable of reducing the signal transmission delay and eliminating the adverse factor in the current critical design rule and layout.

REFERENCES:
patent: 4883980 (1989-11-01), Morimoto et al.
patent: 4906872 (1990-03-01), Tanaka
patent: 4958092 (1990-09-01), Tanaka
patent: 5148401 (1992-09-01), Sekino et al.
patent: 5172335 (1992-12-01), Sasaki et al.

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