Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-04-11
2006-04-11
Portka, Gary (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S129000, C711S141000, C711S144000, C711S170000, C714S766000, C714S768000, C714S777000
Reexamination Certificate
active
07028150
ABSTRACT:
A memory system and method for processing a data structure comprising a plurality of data bits representing a line of memory, wherein the data bits are divided into a plurality of data chunks, each of the data chunks including at least an error correction code portion and a data portion; and a first chunk of said plurality of data chunks having a tag portion, wherein said tag portion includes tag information for the entire line of memory, and wherein subsequent ones of said data chunks do not include tag information.
REFERENCES:
patent: 5025365 (1991-06-01), Mathur et al.
patent: 5067071 (1991-11-01), Schanin et al.
patent: 5398325 (1995-03-01), Chang et al.
patent: 5737757 (1998-04-01), Hassoun et al.
patent: 5825788 (1998-10-01), Pawlowski
patent: 5835949 (1998-11-01), Quattromani et al.
patent: 5862154 (1999-01-01), Pawlowski
patent: 5903908 (1999-05-01), Singh et al.
patent: 5974514 (1999-10-01), Andrewartha et al.
patent: 6038693 (2000-03-01), Zhang
patent: 6049851 (2000-04-01), Bryg et al.
patent: 6092182 (2000-07-01), Mahalingaiah
patent: 6175942 (2001-01-01), Pawlowski
patent: 6266796 (2001-07-01), Pawlowski
patent: 6321359 (2001-11-01), Pawlowski
patent: 6772383 (2004-08-01), Quach et al.
M. Papamarcos and J. Patel “A Low Overhead Coherence Solution for Mulitprocessors with Private Cache Memories” in Proceedings of the 11th International Symposium on Computer Architecture, IEEE, New York (1984), pp. 348-354.
Douglas Robert C.
McAllister Curtis R.
Yu Henry
Hewlett--Packard Development Company, L.P.
Portka Gary
Song Jasmine
LandOfFree
Arrangement of data within cache lines so that tags are... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Arrangement of data within cache lines so that tags are..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Arrangement of data within cache lines so that tags are... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3597637