Arrangement for receiving and transmitting PCI-X data...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S306000, C710S310000, C710S311000, C713S600000

Reexamination Certificate

active

11000062

ABSTRACT:
An integrated device (e.g., an integrated PCI bridge device) buffers received PCI bus strobe signals and distributes strobe signals for PCI receive data relative to the PCI data lines, enabling all PCI receive data to be latched using locally-generated PCI strobe signals generated based on the same PCI bus strobe signals. In addition, data line latch modules having primary and secondary flip-flops enable the PCI receive data to be held for an entire clock cycle, optimizing conversion between a PCI clock domain and a local clock domain of the PCI bridge device. A transmission circuit also can be configured to transmit data according to either double data rate (DDR) mode or quad data rate (QDR) mode in an efficient manner.

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“PCI-X Electrical and Mechanical Addendum to the PCI Local Bus Specification Revision 2.0a”, p. 1-108, Aug. 22, 2003.

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