Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2001-12-12
2003-07-22
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S202000, C711S206000, C711S220000
Reexamination Certificate
active
06598144
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to interaction between a verbs process and a host channel adapter configured for communication with target channel adapters in an InfiniBand™ server system, and more particularly to management of the verbs process during generation of work notifications, also referred to as “doorbells”, that notify the host channel adapter of work queue entries to be serviced.
2. Background Art
Networking technology has encountered improvements in server architectures and design with a goal toward providing servers that are more robust and reliable in mission critical networking applications. In particular, the use of servers for responding to client requests has resulted in a necessity that servers have an extremely high reliability to ensure that the network remains operable. Hence, there has been a substantial concern about server reliability, availability, and serviceability.
In addition, processors used in servers have encountered substantial improvements, where the microprocessor speed and bandwidth have exceeded the capacity of the connected input/output (I/O) buses, limiting the server throughput to the bus capacity. Accordingly, different server standards have been proposed in an attempt to improve server performance in terms of addressing, processor clustering, and high-speed I/O.
These different proposed server standards led to the development of the InfiniBand™ Architecture Specification, (Release 1.0), adopted by the InfiniBand™ Trade Association. The InfiniBand™ Architecture Specification specifies a high-speed networking connection between end nodes (e.g., central processing units, peripherals, etc.) and switches inside a server system. Hence, the term “InfiniBand™ network” refers to a private system area network (SAN) that connects end nodes and switches into a cluster within a server system, enabling the sharing of cluster resources. The InfiniBand™ Architecture Specification specifies both I/O operations and interprocessor communications (IPC).
A particular feature of InfiniBand™ Architecture Specification is the proposed implementation in hardware of the transport layer services present in existing networking protocols, such as TCP/IP based protocols. The hardware-based implementation of transport layer services, referred to as a “channel adapter”, provides the advantage of reducing processing requirements of the central processing unit (i.e., “offloading” processor code execution), hence offloading the operating system of the server system. Host channel adapters (HCAs) are implemented in processor-based nodes, and target channel adapters (TCAs) are implemented in peripheral-based nodes (e.g., network interface devices, mass storage devices, etc.).
However, arbitrary hardware implementations may result in substantially costly or relatively inefficient hardware designs. One example involves the servicing of work notifications, also referred to as “doorbells”. Doorbells are generated by verbs consumer processes (e.g., operating system supplied agents) that post a work request (e.g., a work queue entry (WQE)) to a prescribed queue of an assigned queue pair in system memory; the verbs consumer process then sends the work notification to notify the host channel adapter (HCA) of the work request in system memory.
One concern in implementing the servicing of work notifications is the susceptibility of the HCA to unauthorized work notifications. In particular, the InfiniBand™ Architecture Specification specifies that the verbs consumer processes may be implemented as “ring
0
” (kernel mode) or “ring
3
” (user mode) processes: kernel mode have unrestricted access to any hardware resource accessible by the operating system. Hence, a concern exists that if a malicious or malfunctioning process improperly accesses an unauthorized address, for example a work notification address assigned to a second verbs consumer process, such improper access may cause the HCA to erroneously determine that the second verbs consumer process generated a work notification. Hence, the susceptibility of HCA to unauthorized work notifications by a malicious or malfunctioning process may cause a reliability concern that affects HCA operations. Moreover, concerns arise that such a malicious or malfunctioning process may further affect the reliability of the overall server system, for example compromising security routines normally utilized to prevent unauthorized transmission of private data (e.g., credit card information, etc.) across a public network such as the Internet.
Page-based addressing has been used in processor architectures, for example the Intel-based×86 architectures, to reconcile differences between physical address space and virtual address space. For example, a personal computer capable of addressing 512 Mbytes may only have 128 Mbytes of installed memory; the operating system uses memory segments divided into discrete blocks, referred to as pages, that can be transferred between the physical memory and virtual memory allocated on a hard disk. Hence, the attempted execution of executable code that does not reside in physical memory results in generation of a page fault exception, causing the processor to swap unused pages in physical memory with the pages in virtual memory containing the required executable code. However, different processes still may access the same physical page of memory, since the operating system typically will provide processes a common mapping between the virtual page address and the physical memory address in I/O address space to enable the processes to access the same I/O device control registers of an I/O device within the I/O address space.
SUMMARY OF THE INVENTION
There is a need for an arrangement that enables a host channel adapter to be implemented in an efficient and economical manner.
There also is a need for an arrangement that enables a host channel adapter to service work notifications in a secure manner, without the risk of access to the host channel adapter via unauthorized addresses by unauthorized processes.
These and other needs are attained by the present invention, where an operating system resource, configured for establishing communications between consumer processes configured for generating respective work notifications and a host channel adapter configured for servicing the work notifications, assigns virtual address space for use by the consumer processes in executing memory accesses, and respective unique mapping values. An address translator includes a translation map for uniquely mapping the virtual address space used by the consumer processes to a prescribed physical address space accessible by the host channel adapter. The address translator, in response to receiving from an identified consumer process the work notification at a virtual address, maps the work notification to a corresponding prescribed physical address based on the corresponding mapping value assigned to the identified consumer process, enabling the host channel adapter to detect the work notification for the consumer process.
Hence, the host channel adapter can identify and service work requests based on the prescribed destination address identifying the consumer process, where the mapping of the virtual address to the prescribed physical address supplied by the operating system resource ensures access by the consumer process is limited to a prescribed physical address space, preventing improper addressing by the consumer process.
One aspect of the present invention provides a method in a host computing system. The method includes assigning, by an operating system resource, a prescribed virtual address space and a corresponding mapping value for use by a consumer process for execution of a memory access. The method also includes loading a unique translation map entry having the corresponding mapping value for the consumer process into an address translator configured for controlling the memory access to a physical address space assigned for access to a host channel adapter. The meth
Bailey Joseph A.
Hack Norman
Schmidt Rodney
Advanced Micro Devices , Inc.
Elmore Stephen
Kim Matthew
Manelli Denison & Selter PLLC
Turkevich Leon R.
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