Arrangement for generating digital signals

Details Arrangement for generating digital signals Arrangement for generating digital signals

1996-11-15

1999-02-16

Bocure, Tesfaldet

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375372, 375373, H04L 700, H04L 2536

Patent

active

058728210

ABSTRACT:
Recurring digital control signals are provided in a predeterminable time frame, with a high time-dependent resolution and flexibility. Data for the control signals are stored in a write/read memory addressed by an address counter. A comparator is clocked with a multiple of the digital signals bit clock, for comparison with the content of a time Table stored in the write/read memory. For convenience in synchronizing to the time frames of adjacent cells in a cellular network, an offset adder may add the complement of a measured offset (delay) to the comparator clock signal, so that it is not necessary to adjust the values stored in the time Table.

REFERENCES:
patent: 3883853 (1975-05-01), O'Brien et al.
patent: 4135059 (1979-01-01), Schmidt
patent: 4641269 (1987-02-01), Japenga et al.
patent: 5109393 (1992-04-01), Saegusa

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