Arrangement for extraction and receiving data for a refreshable

Details Arrangement for extraction and receiving data for a refreshable Arrangement for extraction and receiving data for a refreshable

1979-11-08

1981-05-05

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

365222, G11C 706, G11C 700

Patent

active

042662869

ABSTRACT:
A memory of the MOS N channel type comprising two half-memories each conting the same number of columns, each column being bisected at the center by a refreshing amplifier. A bus is alotted to each half-memory and is connectable to any half-column in the half-memory which is addressed so as to read and rewrite in the refreshing phase. The extracting and rewriting arrangement incorporates a flip-flop having its inputs connected to the buses by a differential circuit and its outputs connected to inputs of a read and rewrite circuit. The buses are initialized at a low potential and a reference potential is applied to one bus when the other bus is connected to a half-column. Transient interference rise on the selected bus above the disturbance threshold of the refreshing amplifier is prevented.

REFERENCES:
patent: 3806898 (1974-04-01), Askin
patent: 4110841 (1978-08-01), Schroeder

Affiliated with

Also associated with

Rating

Arrangement for extraction and receiving data for a refreshable does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Arrangement for extraction and receiving data for a refreshable , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Arrangement for extraction and receiving data for a refreshable will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-299117