Arithmetic processing apparatus

Details Arithmetic processing apparatus Arithmetic processing apparatus

2005-08-24

2011-12-27

Pan, Daniel (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S022000, C712S221000, C712S224000

Reexamination Certificate

active

08086830

ABSTRACT:
An arithmetic processing apparatus capable of performing an arithmetic operation for generating a condition flag commonly referred to by using a condition flag generated on an arithmetic operation unit basis in as few steps as possible is provided. The arithmetic processing apparatus, which processes multiple data in parallel based on single instruction, includes: processing elements capable of performing a common arithmetic operation based on the evaluation result of the instruction stored in the instruction register; and a condition flag arithmetic operation unit capable of performing one of the logical operation and the comparison operation on the condition flag retained in each processing element, transferring the operation result to each processing element, and updating the condition flag based on the operation result.

REFERENCES:
patent: 5349671 (1994-09-01), Maeda et al.
patent: 5418917 (1995-05-01), Hiraoka et al.
patent: 5430854 (1995-07-01), Sprague et al.
patent: 5537562 (1996-07-01), Gallup et al.
patent: 5659722 (1997-08-01), Blaner et al.
patent: 5815680 (1998-09-01), Okumura et al.
patent: 6041399 (2000-03-01), Terada et al.
patent: 6317824 (2001-11-01), Thakkar et al.
patent: 2002/0083311 (2002-06-01), Paver
patent: 2002/0114529 (2002-08-01), Horie
patent: 2004/0070526 (2004-04-01), Horie
patent: 2004/0107333 (2004-06-01), Drabenstott et al.
patent: 0682309 (1995-11-01), None
patent: 1-116828 (1989-05-01), None
patent: 4 096133 (1992-03-01), None
patent: 5-189585 (1993-07-01), None
patent: 9 198231 (1997-07-01), None
patent: 10 27102 (1998-01-01), None
patent: 2000 047998 (2000-02-01), None
patent: 2001-265592 (2001-09-01), None
patent: 2004 062401 (2004-02-01), None
patent: 2004-334297 (2004-11-01), None
English language Abstract of JP 4-096133.
English language Abstract of JP 9-198231.
English language Abstract of JP 2004-062401.
English language Abstract of JP 2000-047998.
English language Abstract of JP 10-27102.
English language Abstract of JP 2004-334297, Nov. 25, 2004.
English language Abstract of JP 1-116828, May 9, 1989.
English language Abstract of JP 5-189585, Jul. 30, 1993.
English language Abstract of JP 2001-265592, Sep. 28, 2001.

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