Arithmetic operation method for cyclic redundancy check and...

Details Arithmetic operation method for cyclic redundancy check and... Arithmetic operation method for cyclic redundancy check and...

2006-04-04

2006-04-04

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S799000

Reexamination Certificate

active

07024615

ABSTRACT:
An arithmetic operation method for a cyclic redundancy check is provided which is capable of performing a high-speed arithmetic operation for the cyclic redundancy check.A cyclic redundancy check 32 arithmetic operation is performed on byte data making up output data using a 32nd order generative polynomial. A cyclic redundancy check 16 arithmetic operation is performed on byte data making up the output data using a 16th order generative polynomial. The cyclic redundancy check 16 arithmetic operation is performed on byte data making up the output data and on arithmetic operation result being obtained in a midpoint in the cyclic redundancy check 32 arithmetic operation using the 16th order generative polynomial.

REFERENCES:
patent: 5282215 (1994-01-01), Hyodo et al.
patent: 6324670 (2001-11-01), Henriksen
patent: 6516004 (2003-02-01), Douady et al.
patent: 6725415 (2004-04-01), Ishiwaki

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