Area-efficient surviving paths unit for Viterbi decoders

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

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Details

714792, 375341, G06F 1110, H03D 100

Patent

active

059961120

ABSTRACT:
This invention concerns a novel Viterbi decoding apparatus and method in which a survivor path unit (SPU) implements the traceback method with a RAM which stores path information in a manner which allows fast read access without requiring physical partitioning of the RAM. This results in an implementation that requires less chip area than conventional solutions.

REFERENCES:
patent: 5327440 (1994-07-01), Fredrickson et al.
patent: 5533065 (1996-07-01), Blaker et al.

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