Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-04-03
2007-04-03
Torres, Joseph D. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S794000, C714S796000
Reexamination Certificate
active
10134684
ABSTRACT:
Turbo decoders may have large decoding latency and low throughput due to iterative decoding. One way to increase the throughput and reduce the latency of turbo decoders is to use high speed decoding schemes. In particular, area-efficient parallel decoding schemes may be used to overcome the decoding latency and throughput associated with turbo decoders. In addition, hybrid parallel decoding schemes may be used in high-level parallelism implementations. Moreover, the area-efficient parallel decoding schemes introduce little or no performance degradation.
REFERENCES:
patent: 6484283 (2002-11-01), Stephen et al.
patent: 2001/0052104 (2001-12-01), Xu et al.
patent: 2001/0054170 (2001-12-01), Chass et al.
Jah-Ming Hsu; Chin-Liang Wang; A parallel decoding scheme for turbo codes, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, vol. 4, May 31-Jun. 3, 1998, pp. 445-448.
Lutz Papke and Patrick Robertson, “Improved decoding with SOVA in a parallel concatenated (Turbo-code) scheme,” pp. 102-106, IEEE Int'l conference on comm. (ICC) 1996.
L. Lin and R.S. Cheng, “Improvements in SOVA-Based Decoding for Turbo codes,” pp. 1473-1478, ICC 1997.
Zhongfeng Wang, Hiroshi Suzuki and Keshab K. Parhi, “Efficient Approaches to Improving Performance of Vlsi Sova-Based Turbo Decoders,” pp. I-287-90, ISCAS 2000-IEEE International Symposium on Circuits and Systems, May 30, 2000.
Hiroshi Suzuki, Zhongfeng Wang and Keshab K. Parhi, “A K=3, 2Mbps Low Power Turbo Decoder for 3rdGeneration W-CDMA Systems,” Proceeding of the IEEE Custom Integrated Circuit Conference, Apr. 2000.
Zhongfeng Wang, Hiroshi Suzuki and Keshan K. Parhi, “VLSI Implementation Issues of Turbo Decoder Design for Wireless Applications,” IEEE Workshop on Signal Processing Systems Design and Implementation, Oct. 1999.
Jah-Ming Hsu and Chin-Liang Wang, “A Parallel Decoding Scheme for Turbo Codes,” pp. IV-445-448, IEEE Mar. 1998.
Andrew J. Viterbi, An Intuitive Justification and a Simplified Implementation of the MAP Decoder for Convolutional Codes, Feb. 1998.
Xu et al.,VLSI design and implementation of WCDMA channel decoder, IEEE, Electrical and Computer Engineering, Canadian Conference, May 13-16, 2001, pp. 241-245, vol. 1.
Halter et al.,Reconfigurable signal processor for channel coding and decoding in low SNR wireless communications, IEEE, Signal Processing Systems, 1998.
Hong et al.,VLSI circuit complexity and decoding performance analysis for low-power RSC turbo-code and iterative block decoders design, Military Communications Conference, IEEE, Oct. 18-21, 1998, pp. 708-712, vol. 3.
Beerel et al.,An O(log.sub 2/N)-latency SISO with application to broadband turbo decoding, IEEE. MILCOM 2000, 21stCentury Military, Communications Conference Proceedings, Oct. 22-25, 2000, pp. 194-201, vol. 1.
Xuan et al.,Design and analysis of turbo decoder for Chinese third generation mobile communication system, IEEE, Electronics, Circuits and Systems, Dec. 17-20, 2000, pp. 680-683, vol. 2.
Yan et al.,A low power VLSI architecture of SOVA-based turbo-code decoder using scarce state transition scheme, IEEE, Circuits and Systems, May 28-31, 2000, pp. 283-286, vol. 1.
Beerel et al.,A low latency SISO with application to broadband turbo decoding, IEEE, Selected Areas in Communications, May 2001, pp. 860-870.
Parhi Keshab K.
Wang Zhongfeng
Fish & Richardson P.C.
Regents of the University of Minnesota
Torres Joseph D.
LandOfFree
Area efficient parallel turbo decoding does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Area efficient parallel turbo decoding, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Area efficient parallel turbo decoding will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3799504