Architectures for self-contained, mobile, memory programming

Details Architectures for self-contained, mobile, memory programming Architectures for self-contained, mobile, memory programming

2007-02-27

2007-02-27

McLean-Mayo, Kimberly (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S100000, C711S154000, C712S228000

Reexamination Certificate

active

10665263

ABSTRACT:
A computer system comprising: a plurality of memories each containing one or more locations; and a first threadlet for causing a first program to run in the computer system when at least one first memory location of the plurality of memory locations is local to the threadlet. Also provided is a method allowing such a threadlet to move itself to memories that include some specified second memory location.

REFERENCES:
patent: 6266745 (2001-07-01), de Backer et al.
patent: 6343346 (2002-01-01), Olnowich
Sterling et al., Gilgamesh: A Multithreaded Processor-In-Memory Architecture for Petaflops Computing, IEEE, 2000.
Kogge et al., Implications of a PIM Architectural Model for MPI, CLuster2003 Convention, Dec. 2003.
Holmes et al., Processing in Memory: The Terasys Massively Parallel PIM Array, IEEE 1995.

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