Boots – shoes – and leggings
Patent
1995-06-07
1997-12-23
Harvey, Jack B.
Boots, shoes, and leggings
395312, 364491, 437 51, H01L 2170
Patent
active
057015074
ABSTRACT:
A method of manufacturing integrated circuits uses an architecture having multiple processors and multiple memories, such that there is at least first and second groups of processors and memories. The first group has at least a first processor and at least a first memory. The second group has at least a second processor and at least a second memory. Regardless of where the architecture is sliced, the integrated circuits have a majority of the same address and data pin-outs.
REFERENCES:
patent: 4398248 (1983-08-01), Hsia et al.
patent: 4447881 (1984-05-01), Brantingham et al.
patent: 4968977 (1990-11-01), Chinnaswamy et al.
patent: 4978633 (1990-12-01), Seefeldt et al.
patent: 5226125 (1993-07-01), Balmer et al.
patent: 5369596 (1994-11-01), Tokumaru
Bonneau, Jr. Walt C.
Gove Robert
Guttag Karl
Donaldson Richard L.
Harvey Jack B.
Kesterson James C.
Marshall, Jr. Robert D.
Myers Paul R.
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