Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-03-25
1998-06-30
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
39518202, 39518203, 39518209, 3952005, 39520068, 39580015, 39518221, 39518222, 395701, 711104, G06F 1114
Patent
active
057746427
ABSTRACT:
A computer system for dynamic service processor exchange comprising a first, active service processor connected by a network and a maintenance unit (CMU) to a central system (4) and to a second, backup service processor (2). Each service processor has, in addition to an operating system, a supervisor processor and at least one service broken down into two portions, namely a "body" portion comprising a service processor and a "presentation" portion comprising an interface with the operator allowing a display of the window type with a menu bar. Each service processor further has a maintenance station handler interface (10,20) for processing communications with other service processors by means of the maintenance unit (CMU). The supervisor processor manages the numbers in question and the services, starts the services, and has access to a system configuration table. The computer system permits dynamic service exchange between the active and the backup service processors without the use if system dependent service processors.
REFERENCES:
patent: 4014005 (1977-03-01), Fox et al.
patent: 4894828 (1990-01-01), Novy et al.
patent: 4984240 (1991-01-01), Keren-Zvi et al.
patent: 5008805 (1991-04-01), Fiebig et al.
patent: 5148433 (1992-09-01), Johnson et al.
patent: 5161102 (1992-11-01), Griffin et al.
patent: 5396629 (1995-03-01), Bonnafoux
patent: 5592676 (1997-01-01), Bonnafoux
"Asymmetric Multiprocessing System", IBM Technical Disclosure Bulletin, vol. 29. No. 4, Sep. 1986 (New York, US), p. 1614.
"Dual Service Processor Backup System", IBM Technical Disclosure Bulletin, vol. 29, No. 4, Sep 1986 (New York, US), p. 1631.
Van Wolverton, Running MS DOS, pp. 26-29.
Bonnafoux Jean-Fran.cedilla.ois
Flon Robert
Bull S.A.
Swann Tod R.
Tran Denise
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