Architecture for an output buffered switch with input groups

Details Architecture for an output buffered switch with input groups Architecture for an output buffered switch with input groups

2011-04-12

2011-04-12

Cleary, Thomas J (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S072000, C710S310000, C710S317000

Reexamination Certificate

active

07925816

ABSTRACT:
Embodiments of the present invention provide a system that transfers data between the components in the computer system through a switch. In these embodiments, the switch includes multiple switch chips which are coupled together and are configured to collectively function as a switch. During operation, each switch chip, receives cells from the subset of the set of inputs and selectively transfers each of the cells to at least one output of the subset of the set of outputs coupled to the switch chip or of the subset of the set of outputs coupled to the other switch chips.

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