Arbitration apparatus utilizing mutlilevel priority for...

Details Arbitration apparatus utilizing mutlilevel priority for... Arbitration apparatus utilizing mutlilevel priority for...

2006-03-14

2006-03-14

Elmore, Stephen C. (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S105000, C711S158000

Reexamination Certificate

active

07013368

ABSTRACT:
Probabilities of the changeovers of access pages in the same bank and the changes of types of accesses, for instance the change from read to write or from write to read, are reduced and thereby data transmission performance is improved. If respective memory masters want to acquire the memory use right, they assert request signals and, at the same time, fix address signals and read/write signals. A memory arbitration circuit determines the priority order over the memory use right for the respective memory masters, and asserts an acknowledgement signal for a memory master having the highest priority.

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