Arbiter for array machine context data memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C710S052000, C710S056000

Reexamination Certificate

active

07451268

ABSTRACT:
A device comprises a plurality of interface circuits configured for communicating between a semantic processing unit and a memory and a selection circuit for selecting an interface circuit allocated to a semantic processing unit for processing a data operation request in the memory.

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