Arbiter and arbitration method of multiple data accesses

Electrical computers and digital data processing systems: input/ – Access arbitrating – Access prioritizing

Reexamination Certificate

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C710S117000

Reexamination Certificate

active

07904626

ABSTRACT:
There is provided a technique which reduces an average processing time of low-priority accesses with suppressing an average delay increase of a high-priority access processing even in a case where high-priority access request and a low-request access request are simultaneously generated to a shared access processing unit and high-priority accesses are continuously generated. And, there is provided an access arbitration equipment comprising: an issued access request retention unit; a first interval determination circuit; and a second interval determination circuit. In a case where the first interval determination circuit determines that an interval is generated between an issued access processing and a most prior access processing and a second interval determination circuit determines that no interval is generated between the issued access processing and a second-prior access request, the priority order of the most prior access request and the second-prior access request is changed.

REFERENCES:
patent: 5748969 (1998-05-01), Lee et al.
patent: 5802581 (1998-09-01), Nelsen
patent: 6654833 (2003-11-01), LaBerge
patent: 7380040 (2008-05-01), Sarkar et al.
patent: 2007/0136503 (2007-06-01), Worrell et al.
patent: 2003-30134 (2003-01-01), None

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