Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2004-02-09
2009-02-03
Smith, Zandra V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S750000, C257S752000, C257S753000, C257S758000
Reexamination Certificate
active
07485961
ABSTRACT:
A method is disclosed for reducing the effects of buckling, also referred to as cracking or wrinkling in multilayer heterostructures. The present method involves forming a planarization layer superjacent a semiconductor substrate. A barrier film having a structural integrity is formed superjacent the planarization layer. A second layer is formed superjacent the barrier film. The substrate is heated sufficiently to cause the planarization layer to expand according to a first thermal coefficient of expansion, the second layer to expand according to a second thermal coefficient of expansion, and the structural integrity of the barrier film to be maintained. This results in the barrier film isolating the planarization layer from the second layer, thereby preventing the planarization layer and the second layer from interacting during the heating step.
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Wolfe et al., vol. 1, Silicon Processing for the VLSI Era, Lattice Press, 1986, pp. 0181-0191.
Doan Trung T.
Liu Yauh-Ching
Thakur Randhir P. S.
Au Bac H
Fletcher Yoder
Micro)n Technology, Inc.
Smith Zandra V.
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