Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2011-04-05
2011-04-05
Doan, Duc T (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
Reexamination Certificate
active
07921276
ABSTRACT:
In one embodiment, the present invention includes a translation lookaside buffer (TLB) having storage locations each including a priority indicator field to store a priority level associated with an agent that requested storage of the data in the TLB, and an identifier field to store an identifier of the agent, where the TLB is apportioned according to a plurality of priority levels. Other embodiments are described and claimed.
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Illikkal Ramesh
Iyer Ravishankar
Kannan Hari
Moses Jaideep
Newell Donald
Doan Duc T
Intel Corporation
Trop Pruner & Hu P.C.
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