Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate
2008-07-29
2008-07-29
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having schottky gate
C438S184000, C438S197000, C257SE21409, C257SE21444
Reexamination Certificate
active
07405116
ABSTRACT:
A method to maintain a well-defined gate stack profile, deposit or grow a uniform gate dielectric, and maintain gate length CD control by means of an inert insulating liner deposited after dummy gate etch and before the spacer process. The liner material is selective to wet chemicals used to remove the dummy gate oxide thereby preventing undercut in the spacer region. The method is aimed at making the metal gate electrode technology a feasible technology with maximum compatibility with the existing fabrication environment for multiple generations of CMOS transistors, including those belonging to the 65 nm, 45 nm and 25 nm technology nodes, that are being used in analog, digital or mixed signal integrated circuit for various applications such as communication, entertainment, education and security products.
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Carter Richard J.
Hornback Verne
Lin Hong
Lo Wai
Sun Sey-Shing
Lebentritt Michael
Lee Cheung
LSI Corporation
Trexler Bushnell Giangiorgi & Blackstone Ltd
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