Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2005-02-15
2005-02-15
Peikari, B. James (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S202000, C711S203000, C711S205000, C711S206000, C711S207000, C711S208000, C711S221000, C711S170000, C711S171000, C711S172000, C711S173000
Reexamination Certificate
active
06857058
ABSTRACT:
A data processing system providing high performance two-dimensional and three-dimensional graphics includes at least one system processor, chipset core logic, a graphics processor, main memory storing computer software and data including operating system software, and a graphics address remapping table (GART). The chipset logic operates on first-sized memory pages, while the operating system operates on larger, second-sized memory pages. In one embodiment GART driver software maps each second-sized page to Z first-sized pages by filling up the GART with Z entries per second-sized page, where Z is the rounded integer number of first-sized pages per second-sized page. In another embodiment, an address translation function converts a first page number, corresponding to a first-sized page, issuing from a system processor into a second page number, corresponding to a second-sized page, and a page offset within the second-sized page. Also described is an integrated circuit for mapping memory pages of disparate sizes, and a computer-readable medium storing a data structure for implementing the page mapping method and apparatus.
REFERENCES:
patent: 4285040 (1981-08-01), Carlson et al.
patent: 5058003 (1991-10-01), White
patent: 5129088 (1992-07-01), Auslander et al.
patent: 5426752 (1995-06-01), Takahasi et al.
patent: 5475827 (1995-12-01), Lee et al.
patent: 5479627 (1995-12-01), Khalidi et al.
patent: 5542065 (1996-07-01), Burkes et al.
patent: 5617554 (1997-04-01), Alpert et al.
patent: 5712998 (1998-01-01), Rosen
patent: 5765201 (1998-06-01), Manges et al.
patent: 5784707 (1998-07-01), Khalidi et al.
patent: 6041016 (2000-03-01), Freker
patent: 6069638 (2000-05-01), Porterfield
patent: 6205530 (2001-03-01), Kang
patent: 6289431 (2001-09-01), Bigbee et al.
patent: 6356991 (2002-03-01), Bauman et al.
patent: 6374341 (2002-04-01), Nijhawan et al.
Gurumoorthy Nagasubramanian
Sadashivaiah Shivaprasad
Intel Corporation
Peikari B. James
Schwegman Lundberg Woessner & Kluth P.A.
LandOfFree
Apparatus to map pages of disparate sizes and associated... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus to map pages of disparate sizes and associated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus to map pages of disparate sizes and associated... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3455813