Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Patent
1996-09-12
1998-07-07
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
711 1, 711218, 711219, 341 97, 377 34, G06F 1202, G06F 926
Patent
active
057784159
ABSTRACT:
Memory control circuitry is provided which includes circuitry for generating a sequence of gray code values. Counter circuitry is coupled to the gray code circuitry and controls the duration of assertion of each of the generated gray code values. Bus circuitry is also coupled to the gray code circuitry for transmitting the gray code values generated by circuitry. Programmable logic array circuitry is also coupled to the bus circuitry for transmitting, receiving and decoding each of the gray code values and providing at least one memory control signal in response.
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Marietta Bryan Dale
Oppedahl Douglas Arnold
Chan Eddie P.
Hewlett-Packard Co.
Nguyen Than V.
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