Apparatus, system and method of power state control

Details Apparatus, system and method of power state control Apparatus, system and method of power state control

2008-04-28

2011-11-01

Rinehart, Mark (Department: 2111)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C327S198000, C327S546000, C326S021000

Reexamination Certificate

active

08051313

ABSTRACT:
An apparatus, system and method for asynchronously reducing power in a power domain. In one embodiment, the method includes: (1) receiving a sleep command for the power domain, (2) receiving, upon receiving the sleep command, an affirmative retention status signal denoting that a retention area in the power domain has stored data, (3) receiving, upon receiving the sleep command, an affirmative isolation status signal that denotes that an isolation of the power domain has occurred and (4) providing a power domain off command to the power domain upon receiving at least the sleep command, the affirmative status retention signal and the affirmative status isolation signal. In another embodiment, multiple enable signals are employed to generate a “glitch-free” control for a power switch.

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