Apparatus, system, and method for modifying memory voltage...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing

Reexamination Certificate

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Details

C714S704000, C714S721000, C365S211000, C365S212000, C327S509000, C327S512000, C327S513000

Reexamination Certificate

active

07444490

ABSTRACT:
An apparatus, system, and method are disclosed for modifying memory device timing and voltage. A detection module detects a change of memory device stress. A timing modification module modifies the memory device timing in response to the change of the memory device stress. In addition, a voltage modification module modifies the memory device voltage in response to the change of the memory device stress. In one embodiment, a processor pause module pauses the operation of a processor module while the timing modification module modifies the memory device timing and the voltage modification module modifies the memory device voltage.

REFERENCES:
patent: 4812733 (1989-03-01), Tobey
patent: 5910924 (1999-06-01), Tanaka et al.
patent: 6134167 (2000-10-01), Atkinson
patent: 6421215 (2002-07-01), Bushue
patent: 6560725 (2003-05-01), Longwell et al.

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